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19-4118; Rev 2; 2/09
KIT ATION EVALU ABLE AVAIL
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
General Description
The MAX17020 is a dual Quick-PWMTM step-down power-supply (SMPS) controller with synchronous rectification, intended for main 5V/3.3V or I/O 1.5V/1.05V power generation in battery-powered systems. Lowside MOSFET sensing provides a simple low-cost, highly efficient current sense for valley current-limit protection. Combined with the output overvoltage and undervoltage protection features, this current limit ensures robust output supplies. The 5V/3.3V or 1.5V/1.05V SMPS outputs can save power by operating in pulse-skipping mode or in ultrasonic mode to avoid audible noise. Ultrasonic mode forces the controller to maintain switching frequencies greater than 20kHz at light loads. An internal 100mA linear regulator can be used to either generate the 5V bias needed for power-up or other lower power "always-on" suspend supplies. An independent bypass input allows automatic bypassing of the linear regulator when the SMPS is active. This main controller also includes a secondary feedback input that triggers an ultrasonic pulse (DL1 turned on) if the SECFB voltage drops below its threshold voltage. This refreshes an external charge pump driven by DL1 without overcharging the output voltage. The device includes independent shutdown controls to simplify power-up and power-down sequencing. To prevent current surges at startup, the internal voltage target is slowly ramped up from zero to the final target over a 1ms period. To prevent the output from ringing below ground in shutdown, the internal voltage target is ramped down from its previous value to zero over a 1ms period. Two independent power-good outputs simplify the interface with external controllers. The MAX17020 is a pin-for-pin replacement of the MAX8778. o o o o o o o o o o o o o o o
Features
Dual Quick-PWM Internal 100mA 5V or Adjustable Linear Regulator Independent LDO Bypass Input Internal Boost Diodes Secondary Feedback Input Maintains Charge Pump 3.3V 5mA RTC Power (Always On) OUT1: 5V or 1.5V Fixed or 0.7V Adjustable Feedback OUT2: 3.3V or 1.05V Fixed or Dynamic Adjustable Dynamic 0V to 2V REFIN2 Input on Second SMPS 2V 1% 50A Reference 6V to 24V Input Range (28V max) Ultrasonic Mode Independent SMPS and LDO Enable Controls Independent SMPS Power-Good Outputs Minimal Component Count
MAX17020
Ordering Information
PART MAX17020ETJ+ TEMP RANGE -40C to +85C PIN-PACKAGE 32 TQFN
+Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad.
Pin Configuration
PGND SECFB AGND BST2 DL2 DL1 18 VDD
TOP VIEW
24 LX2 25 DH2 26 ON2 27 PGOOD2 28 SKIP 29 OUT2 30 ILIM2 31 REFIN2 32
23
22
21
20
19
17 16 15 14 13 LX1 DH1 ON1 PGOOD1 ILIM1 FB1 OUT1 BYP
Applications
Notebook Computers Main System Supply (5V and 3.3V Supplies) I/O System Supply (1.5V and 1.05V Supplies) Graphic Cards DDR1, DDR2, DDR3 Power Supplies Game Consoles Low-Power I/O and Chipset Supplies Two-to-Four Li+ Cell Battery-Powered Devices PDAs and Mobile Communicators Telecommunication
MAX17020
BST1 12 11 10 9 8 LDOREFIN
+
1 REF 2 TON 3 VCC 4 ONLDO 5 RTC 6 IN 7 LDO
THIN QFN (T3255-4) 5mm x 5mm A "+" SIGN FIRST-PIN INDICATOR DENOTES A LEAD-FREE PACKAGE.
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
1
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
ABSOLUTE MAXIMUM RATINGS
IN, ONLDO to GND ................................................-0.3V to +28V VDD, VCC to GND .....................................................-0.3V to +6V RTC, LDO to GND ....................................................-0.3V to +6V OUT_ to GND ...........................................................-0.3V to +6V ON1, ON2 to GND....................................................-0.3V to +6V PGOOD_ to GND........................................-0.3V to (VCC + 0.3V) REF, ILIM_, TON, SKIP to GND ..................-0.3V to (VCC + 0.3V) FB1, REFIN2, LDOREFIN to GND ............................-0.3V to +6V SECFB to GND .........................................................-0.3V to +6V BYP to GND..............................................-0.3V to (VLDO + 0.3V) GND to PGND .......................................................-0.3V to +0.3V DL_ to PGND ..............................................-0.3V to (VDD + 0.3V) BST_ to GND ..........................................................-0.3V to +34V BST_ to VDD............................................................-0.3V to +28V DH1 to LX1 ..............................................-0.3V to (VBST1 + 0.3V) BST1 to LX1..............................................................-0.3V to +6V DH2 to LX2 ..............................................-0.3V to (VBST2 + 0.3V) BST2 to LX2..............................................................-0.3V to +6V LDO, RTC, REF Short Circuit to GND.........................Momentary RTC Current Continuous.....................................................+5mA LDO Current (Internal Regulator) Continuous..................................................................+100mA LDO Current (Switched Over) Continuous .....................+200mA Continuous Power Dissipation (TA = +70C) 32-Pin 5mm x 5mm TQFN (derate 34.5mW/C above +70C) .................................2.76W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSECFB = 5V, VREFIN2 = 1.0V, BYP = LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER INPUT SUPPLIES IN Standby Supply Current IN Shutdown Supply Current IIN(STBY) I IN(SHDN) VIN = 6V to 24V, ON1 = ON2 = GND, ONLDO = VCC VIN = 4.5V to 24V, ON1 = ON2 = ONLDO = GND ON1 = ON2 = REFIN2 = VCC, SKIP = FB1 = GND, VOUT2 = 3.5V, VOUT1 = 5.3V ON1 = ON2 = REFIN2 = VCC, SKIP = FB1 = GND, VOUT2 = 3.5V, VOUT1 = 5.3V 5V preset output: FB1 = GND, VIN = 12V, SKIP = VCC 1.5V preset output: FB1 = VCC (5V), VIN = 12V, SKIP = VCC Adjustable feedback output, VIN = 12V, SKIP = VCC Low FB1 Dual-ModeTM Threshold Voltage Levels FB1 Input Bias Current IFB1 High VFB1 = 0.8V, TA = +25C 85 50 175 70 A A SYMBOL CONDITIONS MIN TYP MAX UNITS
IN Supply Current
I IN
0.1
0.2
mA
VCC Supply Current PWM CONTROLLERS
ICC
1.0
1.5
mA
4.95 1.485 0.693 0.7 0.04 VCC 1.6V -0.2
5.00 1.50 0.700
5.05 1.515 0.707 5.5 0.110 VCC 0.7V +0.2 V A V V
OUT1 Output Voltage Accuracy (Note 1)
VOUT1
VFB1 OUT1 Voltage Adjust Range
Dual Mode is a trademark of Maxim Integrated Products, Inc.
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSECFB = 5V, VREFIN2 = 1.0V, BYP = LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER SYMBOL CONDITIONS 3.3V preset output: REFIN2 = VCC (5V), VIN = 12V, SKIP = VCC 1.05V preset output: REFIN2 = RTC (3.3V), VIN = 12V, SKIP = VCC Tracking output: VREFIN2 = 1.0V, VIN = 12V, SKIP = VCC MIN 3.267 1.040 0.995 0 0 IREFIN2 VREFIN2 = 2.2V, TA = +25C VREFIN2 = 0, TA = +25C Low (REFIN2 = RTC) High (REFIN2 = VCC) Either SMPS, SKIP = VCC, ILOAD = 0 to 5A Either SMPS, SKIP = REF, ILOAD = 0 to 5A Either SMPS, SKIP = GND, ILOAD = 0 to 5A Line Regulation Error DH1 On-Time t ON1 Either SMPS, VIN = 6V to 24V VIN = 12V, VOUT1 = 5.0V (Note 2) VIN = 12V, VOUT2 = 3.3V (Note 2) (Note 2) Rising/falling edge on ON1 or ON2 (preset) Rising/falling edge on ON2 (REFIN2 ADJ) Rising edge on REFIN2 20 1.94 VSECFB = 2.2V, TA = +25C -0.2 TON = GND or REF (400kHz) TON = VCC (200kHz) TON = GND (500kHz) TON = REF or VCC (300kHz) 895 1895 475 833 -0.1 -0.5 2.2 VCC 1.0V -0.1 -1.7 -1.5 0.005 1052 2105 555 925 250 1 1 8 27 2.0 2.06 +0.2 1209 2315 635 1017 400 ns ns ms mV/s mV/s kHz V A %/V ns % TYP 3.30 1.050 1.00 MAX 3.333 1.060 1.005 2 2 +0.1 +0.1 3.0 VCC 0.4V V V V A V UNITS
MAX17020
OUT2 Output Voltage Accuracy (Note 1)
VOUT2
OUT2 Voltage-Adjust Range REFIN2 Voltage-Adjust Range REFIN2 Input Bias Current REFIN2 Dual-Mode Threshold Voltage Levels
Load Regulation Error
DH2 On-Time Minimum Off-Time Soft-Start/Stop Slew Rate Soft-Start/Stop Slew Rate Dynamic REFIN2 Slew Rate SECFB Threshold Voltage SECFB Input Bias Current LINEAR REGULATOR (LDO)
t ON2 t OFF(MIN) t SS t SS tDYN VSECFB I SECFB
Ultrasonic Operating Frequency fSW(USONIC) SKIP = open (REF)
LDO Output-Voltage Accuracy
LDOREFIN Input Range LDOREFIN Leakage Current LDOREFIN Dual-Mode Threshold Voltage
VIN = 24V, LDOREFIN = BYP = GND, 0mA < ILDO < 100mA VIN = 24V, LDOREFIN = VCC, BYP = GND, VLDO 0mA < ILDO < 100mA VIN = 24V, BYP = GND, VLDOREFIN = 0.5V, 0mA < ILDO < 100mA VLDOREFIN VLDO = 2 x VLDOREFIN ILDOREFIN VLDOREFIN = 0 or 2V, TA = +25C LDOREFIN low threshold LDOREFIN high threshold
4.90 3.23 0.960 0.3 -0.5 0.1 VCC 2V
5.0 3.3 1.0
5.10 3.37 1.040 2.0 +0.5 V A V V
0.15 VCC 1.5V
0.20 VCC 0.9V
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSECFB = 5V, VREFIN2 = 1.0V, BYP = LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER LDO Short-Circuit Current LDO Regulation Reduction/ Bypass Switchover Threshold LDO Bypass Switchover Threshold LDO Bypass Switchover Startup Timeout LDO Bypass Switch Resistance VCC Undervoltage-Lockout (UVLO) Threshold Thermal-Shutdown Threshold tBYP SYMBOL IILIM(LDO) LDO = GND With respect to the LDO voltage, falling edge of BYP With respect to the LDO voltage, rising edge of BYP Rising edge of BYP to bypass gate pulled low LDO to BYP, VBYP = 5V (Note 4) Falling edge of VCC, VUVLO(VCC) PWM disabled below this threshold Rising edge of VCC TSHDN Hysteresis = 10C ON1 = ON2 = GND, VIN = 6V to 24V, 0 < IRTC < 5mA ON1 = ON2 = ONLDO = GND, VIN = 6V to 24V, 0 < IRTC < 5mA RTC = GND VCC = 4.5V to 5.5V, IREF = 0 IREF = -20A to 50A 3.8 CONDITIONS MIN 100 -11.0 -8.5 -6.5 500 1.2 4.0 4.2 +160 C 4.5 4.3 TYP MAX 260 -6.0 UNITS mA % % s V
3.3V ALWAYS-ON LINEAR REGULATOR (RTC) 3.23 3.19 5 1.980 -10 1.95 2.00 3.33 3.43 V 3.47 30 2.020 +10 mA V mV V
RTC Output-Voltage Accuracy
VRTC
RTC Short-Circuit Current REFERENCE (REF) Reference Voltage Reference Load-Regulation Error REF Lockout Voltage OUT1 FAULT DETECTION OUT1 Overvoltage Trip Threshold OUT1 Overvoltage FaultPropagation Delay OUT1 Undervoltage-Protection Trip Threshold OUT1 Output-Undervoltage Fault-Propagation Delay PGOOD1 Lower Trip Threshold PGOOD1 Propagation Delay PGOOD1 Output Low Voltage PGOOD1 Leakage Current
IILIM(RTC) VREF VREF
VREF(UVLO) Rising edge, 350mV (typ) hysteresis
VOVP(OUT1) With respect to error-comparator threshold tOVP FB1 forced 50mV above trip threshold
13
16 10
19
% s
VUVP(OUT1) With respect to error-comparator threshold tUVP With respect to error-comparator threshold, falling edge, hysteresis = 1% tPGOOD1 FB1 forced 50mV beyond PGOOD1 trip threshold, falling edge VFB1 = 0.56V (PGOOD1 low impedance), ISINK = 4mA IPGOOD1 VFB1 = 0.70V (PGOOD1 high impedance), PGOOD1 forced to 5.5V, TA = +25C
65
70 10
75
% s
-19
-16 10
-13
% s
0.3 1
V A
4
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSECFB = 5V, VREFIN2 = 1.0V, BYP = LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER OUT2 FAULT DETECTION Preset mode (REFIN2 = RTC or VCC): with respect to error-comparator threshold OUT2 Overvoltage Trip Threshold VOVP(OUT2) Dynamic transition, SKIP = REF or VCC and OUT2 > REFIN2 Tracking mode: with respect to REFIN2 voltage Minimum overvoltage threshold OUT2 Overvoltage Fault-Propagation Delay OUT2 Undervoltage-Protection Trip Threshold OUT2 Overvoltage Fault-Propagation Delay OUT2 Output Undervoltage Fault-Propagation Delay Dynamic REFIN2 Transition PGOOD Blanking Threshold t OVP OUT2 forced 50mV above trip threshold 65 -250 13 16 VREF + 0.20 200 0.7 10 70 -300 10 10 75 -350 19 % V 230 mV V s % mV s s SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX17020
170
Preset mode: with respect to VUVP(OUT2) error-comparator threshold Tracking mode: with respect to REFIN2 voltage t OVP tUVP OUT2 forced 50mV above trip threshold OUT2 forced 50mV below trip threshold Blanking initiated; REFIN2 deviation from the internal target voltage (error-comparator threshold); hysteresis = 5mV Preset mode: with respect to error-comparator threshold, falling edge, hysteresis = 1% Tracking mode: with respect to REFIN2 voltage, falling edge, hysteresis = 12mV t PGOOD2 OUT2 forced 50mV beyond PGOOD1 trip threshold, falling edge V OUT2 = VREFIN2 - 150mV (PGOOD2 low impedance), I SINK = 4mA I PGOOD2 OUT2 = REFIN2 (PGOOD2 high impedance), PGOOD2 forced to 5.5V, TA = +25C
25
mV
-19 -175
-16 -150 10
-13 -125
% mV s
PGOOD2 Lower Trip Threshold
PGOOD2 Propagation Delay PGOOD2 Output-Low Voltage PGOOD2 Leakage Current CURRENT LIMIT ILIM_ Adjustment Range ILIM_ Current Valley Current-Limit Threshold (Adjustable) Current-Limit Threshold (Negative) Ultrasonic Current-Limit Threshold Current-Limit Threshold (Zero Crossing)
0.3 1
V A
VILIM IILIM RILIM_ = 100k VVALLEY VAGND - VLX_ RILIM_ = 200k RILIM_ = 400k VNEG VNEG(US) VZX With respect to valley current-limit threshold, SKIP = VCC VOUT1 = VOUT2 = VFB1 = 0.77V, VREFIN2 = 0.70V VAGND - VLX_, SKIP = GND or OPEN/REF
0.2 5 44 90 180 50 100 200 -120 25 3
2.0 56 110 220
V A mV
% mV mV
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSECFB = 5V, VREFIN2 = 1.0V, BYP = LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER GATE DRIVERS DH_ Gate Driver On-Resistance DL_ Gate Driver On-Resistance DH_ Gate Driver Source/Sink Current DL_ Gate Driver Source Current DL_ Gate Driver Sink Current Internal BST_ Switch On-Resistance BST_ Leakage Current INPUTS AND OUTPUTS High TON Input Logic Levels REF or open Low High (forced-PWM) SKIP Input Logic Levels Open (ultrasonic) Low (skip) SKIP, TON Leakage Current ON_ Input Logic Levels ON_ Leakage Current ONLDO Input Logic Levels ONLDO Leakage Current I ONLDO I ON_ I SKIP, ITON VSKIP = VTON = 0 or 5V, TA = +25C 68mV hysteresis High (SMPS on) Low (SMPS off) -2 2.4 0.8 -1 +1 High (SMPS on) Low (SMPS off) -2 2.4 0.8 +2 VCC 0.4V 1.6 3.0 0.4 +2 A V A V A V VCC 0.4V 1.6 RDH RDL IDH IDL
(SOURCE)
SYMBOL
CONDITIONS BST1 - LX1 and BST2 - LX2 forced to 5V DL1, DL2; high state DL1, DL2; low state DH1, DH2 forced to 2.5V, BST1 - LX1 and BST2 - LX2 forced to 5V DL1, DL2 forced to 2.5V DL1, DL2 forced to 2.5V IBST _ = 10mA, VDD = 5V VBST _ = 26V, TA = +25C, OUT2 and FB1 above regulation threshold
MIN
TYP 1.5 2.2 0.6 2 1.7 3.3 5 0.1
MAX 3.5 4.5 1.5
UNITS
A A A
IDL (SINK) RBST IBST
5
A
3.0 0.4
V
VON1 = V ON2 = 0 or 5V, TA = +25C 68mV hysteresis
VONLDO = 0 or 24V, TA = +25C
6
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSECFB = 5V, VREFIN2 = 1.0V, BYP = LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = VCC, TA = -40C to +85C, unless otherwise noted.) (Note 3)
PARAMETER INPUT SUPPLIES IN Standby Supply Current IN Shutdown Supply Current IN Supply Current VCC Supply Current PWM CONTROLLERS 5V preset output: FB1 = GND, VIN = 12V, SKIP = VCC 1.5V preset output: FB1 = VCC (5V), VIN = 12V, SKIP = VCC Adjustable feedback output, VIN = 12V, SKIP = VCC Low High 3.3V preset output: REFIN2 = VCC (5V), VIN = 12V, SKIP = VCC OUT2 Output-Voltage Accuracy (Note 1) V OUT2 1.05V preset output: REFIN2 = RTC (3.3V), VIN = 1.2V, SKIP = VCC Tracking output: VREFIN2 = 1.0V, VIN = 12V, SKIP = VCC OUT2 Voltage-Adjust Range REFIN2 Voltage-Adjust Range REFIN2 Dual-Mode Threshold Voltage Low (REFIN2 = RTC) High (REFIN2 = VCC) VIN = 12V, V OUT1 = 5.0V (Note 2) VIN = 12V, V OUT2 = 3.3V (Note 2) (Note 2) 18 1.92 2.08 TON = GND or REF (400kHz) TON = VCC (200kHz) TON = GND (500kHz) TON = REF or VCC (300kHz) 4.90 1.47 0.685 0.7 0.040 VCC 1.6V 3.234 1.029 0.985 0 0 2.2 VCC 1.2V 895 1895 475 833 5.10 1.53 0.715 5.5 0.125 VCC 0.7V 3.366 1.071 1.015 2 2 3.0 VCC 0.4V 1209 2315 635 1017 425 ns ns kHz V V V V V V V V IIN(STBY) IIN(SHDN) IIN ICC VIN = 6V to 24V, ON1 = ON2 = GND, ONLDO = VCC VIN = 4.5V to 24V, ON1 = ON2 = ONLDO = GND ON1 = ON2 = REFIN2 = VCC, SKIP = FB1 = GND, VOUT2 = 3.5V, VOUT1 = 5.3V ON1 = ON2 = REFIN2 = VCC, SKIP = FB1 = GND, VOUT2 = 3.5V, VOUT1 = 5.3V 200 70 0.2 1.5 A A mA mA SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX17020
OUT1 Output-Voltage Accuracy (Note 1)
V OUT1
VFB1 OUT1 Voltage-Adjust Range FB1 Dual-Mode Threshold Voltage
DH1 On-Time
t ON1
ns
DH2 On-Time Minimum Off-Time Ultrasonic Operating Frequency SECFB Threshold Voltage
t ON2 t OFF(MIN) VSECFB
fSW(USONIC) SKIP = open (REF)
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7
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSECFB = 5V, VREFIN2 = 1.0V, BYP = LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = VCC, TA = -40C to +85C, unless otherwise noted.) (Note 3)
PARAMETER LINEAR REGULATOR (LDO) VIN = 24V, LDOREFIN = BYP = GND, 0mA < ILDO < 100mA LDO Output-Voltage Accuracy VLDO VIN = 24V, LDOREFIN = VCC, BYP = GND, 0mA < ILDO < 100mA VIN = 24V, BYP = GND, VLDOREFIN = 0.5V, 0mA < ILDO < 100mA LDOREFIN Input Range LDOREFIN Dual-Mode Threshold Voltage LDO Short-Circuit Current LDO Regulation Reduction/ Bypass Switchover Threshold VCC Undervoltage-Lockout Threshold VUVLO(VCC) I ILIM(LDO) VLDOREFIN VLDO = 2x VLDOREFIN LDOREFIN low threshold LDOREFIN high threshold LDO = GND Falling edge of BYP Falling edge of VCC, PWM disabled below this threshold ON1 = ON2 = GND, VIN = 6V to 24V, 0 < IRTC < 5mA ON1 = ON2 = ONLDO = GND, VIN = 6V to 24V, 0 < IRTC < 5mA RTC = GND VCC = 4.5V to 5.5V, IREF = 0 IREF = -20A to 50A -12 3.8 4.85 3.20 0.960 0.3 0.10 VCC 2V 5.15 3.40 1.040 2.0 0.25 VCC 0.9V 260 -5 4.3 V mA % V V V SYMBOL CONDITIONS MIN TYP MAX UNITS
3.3V ALWAYS-ON LINEAR REGULATOR (RTC) 3.18 3.16 5 1.975 -10 3.45 V 3.50 30 2.025 +10 mA V mV
RTC Output-Voltage Accuracy
VRTC
RTC Short-Circuit Current REFERENCE (REF) Reference Voltage Reference Load-Regulation Error OUT1 FAULT DETECTION OUT1 Overvoltage Trip Threshold OUT1 Undervoltage-Protection Trip Threshold PGOOD1 Lower Trip Threshold PGOOD1 Output-Low Voltage OUT2 FAULT DETECTION OUT2 Overvoltage Trip Threshold
I ILIM(RTC) VREF VREF
VOVP(OUT1) With respect to error-comparator threshold VUVP(OUT1) With respect to error-comparator threshold With respect to error-comparator threshold, falling edge, hysteresis = 1% VFB1 = 0.56V (PGOOD1 low impedance), I SINK = 4mA Preset mode (REFIN2 = RTC or VCC): with VOVP(OUT2) respect to error-comparator threshold Tracking mode: with respect to REFIN2 voltage
12 63 -20
20 77 -12 0.4
% % % V
12 160
20 240
% mV
8
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, no load on LDO, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSECFB = 5V, VREFIN2 = 1.0V, BYP = LDOREFIN = GND, ONLDO = IN, ON1 = ON2 = VCC, TA = -40C to +85C, unless otherwise noted.) (Note 3)
PARAMETER OUT2 Undervoltage-Protection Trip Threshold SYMBOL CONDITIONS MIN 63 -230 -20 -185 TYP MAX 77 -370 -12 -115 0.4 UNITS % mV % mV V Preset mode: with respect to error-comparator VUVP(OUT2) threshold Tracking mode: with respect to REFIN2 voltage Preset mode: with respect to error-comparator threshold, falling edge, hysteresis = 1% Tracking mode: with respect to REFIN2 voltage, falling edge, hysteresis = 12mV VOUT2 = VREFIN2 - 150mV (PGOOD2 low impedance), ISINK = 4mA VILIM RILIM_ = 100k VVALLEY VAGND - VLX_ RILIM_ = 200k RILIM_ = 400k GATE DRIVERS DH_ Gate Driver On-Resistance DL_ Gate Driver On-Resistance INPUTS AND OUTPUTS High TON Input Logic Levels REF or open Low High (forced-PWM) SKIP Input Logic Levels Open (ultrasonic) Low (skip) ON_ Input Logic Levels ONLDO Input Logic Levels High (SMPS on) Low (SMPS off) High (LDO on) Low (LDO off) 2.4 0.8 2.4 0.8 VCC 0.4V 1.6 3.0 0.4 V V V VCC 0.4V 1.6 3.0 0.4 V RDH RDL BST1 - LX1 and BST2 - LX2 forced to 5V DL1, DL2; high state DL1, DL2; low state 3.5 4.5 1.5 0.2 40 85 164
MAX17020
PGOOD2 Lower Trip Threshold
PGOOD2 Output-Low Voltage CURRENT LIMIT ILIM_ Adjustment Range Valley Current-Limit Threshold (Adjustable)
2.0 60 115 236
V mV
Note 1: DC output accuracy specifications refer to the threshold of the error comparator. When the inductor is in continuous conduction, the MAX17020 regulates the valley of the output ripple, so the actual DC output voltage is higher than the trip level by 50% of the output ripple voltage. In discontinuous conduction (IOUT < ILOAD(SKIP)), the output voltage has a DC regulation level higher than the error-comparator threshold by approximately 1.5% due to slope compensation. Note 2: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = PGND, VBST = 5V, and a 500pF capacitor from DH to LX to simulate external MOSFET gate capacitance. Actual in-circuit times might be different due to MOSFET switching speeds. Note 3: Limits are 100% production tested at TA = +25C. Maximum and minimum limits over temperature are guaranteed by design and characterization. Note 4: Specifications increased by 1 to account for test measurement error.
_______________________________________________________________________________________
9
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
Typical Operating Characteristics
(Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TON = REF, TA = +25C, unless otherwise noted.)
5V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX17020 toc01
5V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX17020 toc02
3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT
5V SMPS ENABLED 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 12V SKIP MODE PWM MODE 0.01 0.1 1 10 7V 20V
MAX17020 toc03
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0.01
7V
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 PWM MODE ULTRASONIC MODE SKIP MODE
100
12V
20V SKIP MODE PWM MODE 0.1 1 10
55 50 0.01 0.1 1
12V 10
50 LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX17020 toc04
SMPS OUTPUT VOLTAGE DEVIATION vs. LOAD CURRENT
MAX17020 toc05
SWITCHING FREQUENCY vs. LOAD CURRENT
PWM MODE SWITCHING FREQUENCY (kHz)
MAX17020 toc06
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0.01 0.1 1 12V PWM MODE ULTRASONIC MODE 5V SMPS ENABLED SKIP MODE
3 OUTPUT VOLTAGE DEVIATION (%) 2 1 PWM MODE 0 -1 -2 -3 SKIP MODE 12V 0.01 0.1 1 LOW-NOISE ULTRASONIC
1000
100
LOW-NOISE ULTRASONIC MODE SKIP MODE
10
1 10 0.01 0.1 1 LOAD CURRENT (A)
12V 10
10
LOAD CURRENT (A)
LOAD CURRENT (A)
5V LDO OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17020 toc07
3.3V RTC OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17020 toc08
NO-LOAD INPUT SUPPLY CURRENT vs. INPUT VOLTAGE
PWM MODE LOW-NOISE ULTRASONIC SKIP MODE 1
MAX17020 toc09
5.2
3.5
100
5.1 OUTPUT VOLTAGE (V)
3.4 OUTPUT VOLTAGE (V)
5.0
3.3
4.9
3.2
SUPPLY CURRENT (mA) 0 2 12
10
4.8
3.1
0.1
4.7 0 20 40 60 80 100 120 140 LOAD CURRENT (mA)
3.0 4 6 8 10 LOAD CURRENT (mA)
0.01 0 5 10 15 20 25 INPUT VOLTAGE (V)
10
______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TON = REF, TA = +25C, unless otherwise noted.)
STANDBY AND SHUTDOWN INPUT SUPPLY CURRENT vs. INPUT VOLTAGE
MAX17020 toc10
MAX17020
REFERENCE OFFSET VOLTAGE DISTRIBUTION
+85C SAMPLE PERCENTAGE (%) 60 50 40 30 20 10 0 +25C SAMPLE SIZE = 150
MAX17020 toc11
REFIN2 OFFSET VOLTAGE DISTRIBUTION
+85C SAMPLE PERCENTAGE (%) 60 50 40 30 20 10 0 +25C SAMPLE SIZE = 150
MAX17020 toc12
1
70
70
SUPPLY CURRENT (mA)
STANDBY (ONLDO = VIN) 0.1
SHUTDOWN (ONLDO = ON1 = ON2 = GND) 0.01 0 5 10 15 20 25 INPUT VOLTAGE (V)
-20
-12
-4
4
12
20
-5
-3
-1
1
3
5
2V REF OFFSET VOLTAGE (mV)
REFIN2 OFFSET VOLTAGE (mV)
100mV ILIM THRESHOLD VOLTAGE DISTRIBUTION
+85C SAMPLE PERCENTAGE (%) 40 +25C SAMPLE SIZE = 150
MAX17020 toc13
LDO AND RTC POWER-UP
MAX17020 toc14
LDO AND RTC POWER REMOVAL
MAX17020 toc15
50
12V
A 12V B 5V
12V A 12V 5V
30
0V 0V C 3.3V D 2.0V 2V 3.3V B 5V C 3.3V D 2.0V 200s/div A. INPUT SUPPLY, 5V/div C. 3.3V RTC, 2V/div B. 5V LDO, 2V/div D. 2.0V REF, 1V/div
20 0V 10 0V 0 90 94 98 102 106 110 ILIM THRESHOLD VOLTAGE (mV) 200s/div A. INPUT SUPPLY, 5V/div C. 3.3V RTC, 2V/div B. 5V LDO, 2V/div D. 2.0V REF, 1V/div
______________________________________________________________________________________
11
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TON = REF, TA = +25C, unless otherwise noted.)
5V LDO LOAD TRANSIENT
MAX17020 toc16
5V SMPS STARTUP AND SHUTDOWN
MAX17020 toc17
STARTUP WAVEFORMS (SWITCHING REGULATORS)
MAX17020 toc18
5V 5V A
A 5V
5V 0V 5V
A B 5V
5V B 5V
5V
0V 0.1A 0A 4s/div A. LDO OUTPUT, 100mV/div B. LOAD CURRENT, 100mA/div B 0V 5V C 0V 200s/div A. 5V LDO OUTPUT, 0.2V/div B. 5V SMPS OUTPUT, 2V/div C. ON1, 5V/div 100s/div A. ON1, 2V/div C. PGOOD1, 5V/div B. 5V SMPS OUTPUT, D. INDUCTOR CURRENT, 2V/div 5A/div 0V 0A C D
SHUTDOWN WAVEFORMS (SWITCHING REGULATORS)
MAX17020 toc19
5V SMPS LOAD TRANSIENT (PWM MODE)
MAX17020 toc20
3.1A 5V 0V 5V 5V 0V 5V 0V 0A 200s/div A. ON1, 5V/div C. PGOOD1, 2V/div B. 5V SMPS OUTPUT, D. INDUCTOR CURRENT, 2V/div 5A/div B C D 0A C B A 0A A
40s/div A. LOAD CURRENT, 2A/div B. 5V SMPS OUTPUT, 100mV/div C. INDUCTOR CURRENT, 2A/div
12
______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TON = REF, TA = +25C, unless otherwise noted.)
3.3V SMPS LOAD TRANSIENT
MAX17020 toc21
MAX17020
POWER REMOVAL (SMPS UVLO RESPONSE)
MAX17020 toc22
6.5A 0.5A A
7V A 5V
3.3V
B
5V B C 5V
0A
C
D
40s/div A. LOAD CURRENT, 5A/div B. 3.3V SMPS OUTPUT, 100mV/div C. INDUCTOR CURRENT, 5A/div
10ms/div A. INPUT VOLTAGE, 5V/div C. 5V SMPS, 2V/div B. 5V LDO OUTPUT, 2V/div D. PGOOD1, 5V/div
Pin Description
PIN NAME FUNCTION 2V Reference-Voltage Output. Bypass REF to AGND with a 0.1F or greater ceramic capacitor. The reference can source up to 50A for external loads. Loading REF degrades output-voltage accuracy according to the REF load-regulation error. The reference shuts down when ON1, ON2, and ONLDO are all pulled low. Switching-Frequency Setting Input. Select the OUT1/OUT2 switching frequencies by connecting TON as follows for: High (VCC) = 200kHz/300kHz Open (REF) = 400kHz/300kHz GND = 400kHz/500kHz Analog Supply Voltage Input. Connect VCC to the system supply voltage with a series 50 bypass to analog ground using a 1F or greater ceramic capacitor. resistor, and
1
REF
2
TON
3 4
VCC ONLDO
Enable Input for LDO. Drive ONLDO high to enable the linear regulator (LDO) output. Drive ONLDO low to shut down the linear regulator output. 3.3V Always-On Linear Regulator Output for RTC Power. Bypass RTC with a 1F or greater ceramic capacitor to analog ground. RTC can source at least 5mA for external load support. RTC power-up is required for controller operation. Power-Input Supply. IN powers the linear regulators (RTC and LDO) and senses the input voltage for the Quick-PWM on-time one-shot timers. The high-side MOSFET's on-time is inversely proportional to the input voltage. Bypass IN with a 0.1F or greater ceramic capacitor to PGND close to the MAX17020. Linear Regulator Output. Bypass LDO with a 4.7F or greater ceramic capacitor. LDO can source at least 100mA for external load support. LDO is powered from IN and its regulation threshold is set by LDOREFIN. For preset 5V operation, connect LDOREFIN directly to GND. For preset 3.3V operation, connect LDOREFIN directly to VCC. When LDO is used for 5V operation, LDO must supply VCC and VDD.
5
RTC
6
IN
7
LDO
______________________________________________________________________________________
13
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
Pin Description (continued)
PIN NAME FUNCTION External Reference Input for the Linear Regulator. LDOREFIN sets the LDO regulation voltage (VLDO = 2 x VLDOREFIN) for a 0.3V to 2V LDOREFIN range. Connect LDOREFIN to GND for a fixed 5V linear-regulator LDOREFIN output voltage, or connect LDOREFIN to VCC for a fixed 3.3V linear-regulator output voltage. When LDO is set to 5V and is enabled, LDO must supply VCC and VDD. BYP Linear Regulator Bypass Input. When BYP voltage exceeds 93.5% of the LDO voltage, the controller bypasses the LDO output to the BYP input. The bypass switch is disabled if the LDO voltage drops by 8.5% from its nominal regulation threshold. When not being used, connect BYP to GND. Output Voltage-Sense Input for SMPS1. OUT1 is an input to the Quick-PWM on-time one-shot timer. OUT1 also serves as the feedback input for the preset 5V (FB1 = GND) and 1.5V (FB1 = VCC) output voltage settings. Adjustable Feedback Voltage-Sense Connection for SMPS1. Connect FB1 to GND for fixed 5V operation. Connect FB1 to VCC for fixed 1.5V operation. Connect FB1 to an external resistive voltage-divider from OUT1 to analog ground to adjust the output voltage between 0.7V and 5.5V. Valley Current-Limit Adjustment for SMPS1. The GND - LX1 current-limit threshold is 1/10 the voltage present on ILIM1 over a 0.2V to 2V range. An internal 5A current source allows this voltage to be set with a single resistor between ILIM1 and analog ground. Open-Drain Power-Good Output for SMPS1. PGOOD1 is low when the output voltage is more than 16% (typ) below the nominal regulation threshold, during soft-start, in shutdown, and after the fault latch has been tripped. After the soft-start circuit has terminated, PGOOD1 becomes high impedance if the output is in regulation. Enable Input for SMPS1. Drive ON1 high to enable SMPS1. Drive ON1 low to shut down SMPS1. High-Side Gate-Driver Output for SMPS1. DH1 swings from LX1 to BST1. Inductor Connection for SMPS1. Connect LX1 to the switched side of the inductor. LX1 is the lower supply rail for the DH1 high-side gate driver. Boost Flying-Capacitor Connection for SMPS1. Connect to an external capacitor as shown in Figure 1. An optional resistor in series with BST1 allows the DH1 turn-on current to be adjusted. Low-Side Gate-Driver Output for SMPS1. DL1 swings from PGND to VDD. Supply-Voltage Input for the DL_ Gate Drivers. Connect to a 5V supply. Also connect to the drain of the BST diode switch. Secondary Feedback Input. The secondary feedback input forces the SMPS1 output into ultrasonic mode when the SECFB voltage drops below its 2V threshold voltage. This forces DL1 and DH1 to switch, allowing the system to refresh an external low-power charge pump being driven by DL1 (see Figure 1). Connect SECFB to VCC to the 5V bias supply to disable secondary feedback. Analog Ground. Connect the backside exposed pad to AGND. Power Ground Low-Side Gate-Driver Output for SMPS2. DL2 swings from PGND to VDD. Boost Flying-Capacitor Connection for SMPS2. Connect to an external capacitor as shown in Figure 1. An optional resistor in series with BST2 allows the DH2 turn-on current to be adjusted. Inductor Connection for SMPS2. Connect LX2 to the switched side of the inductor. LX2 is the lower supply rail for the DH2 high-side gate driver.
8
9
10
OUT1
11
FB1
12
ILIM1
13 14 15 16 17 18 19
PGOOD1 ON1 DH1 LX1 BST1 DL1 VDD
20
SECFB
21 22 23 24 25
AGND PGND DL2 BST2 LX2
14
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
Pin Description (continued)
PIN 26 27 NAME DH2 ON2 FUNCTION High-Side Gate-Driver Output for SMPS2. DH2 swings from LX2 to BST2. Enable Input for SMPS2. Drive ON2 high to enable SMPS2. Drive ON2 low to shut down SMPS2. Open-Drain Power-Good Output for SMPS2. PGOOD2 is low when the output voltage is more than 150mV (typ) below the REFIN2 voltage or more than 16% below the preset voltage, during soft-start, in shutdown, and when the fault latch has been tripped. After the soft-start circuit has terminated, PGOOD2 becomes high impedance if the output is in regulation. PGOOD2 is blanked--forced high-impedance state--when a dynamic REFIN transition is detected. Pulse-skipping Control Input. This three-level input determines the operating mode for the switching regulators: High (VCC) = Forced-PWM operation Open/REF (2V) = Ultrasonic mode GND = Pulse-skipping mode Output Voltage-Sense Input for SMPS2. OUT2 is an input to the Quick-PWM on-time one-shot timer. OUT2 also serves as the feedback input for the preset 3.3V (REFIN2 = VCC) and 1.05V (REFIN2 = RTC). Valley Current-Limit Adjustment for SMPS2. The GND - LX2 current-limit threshold is 1/10 the voltage present on ILIM2 over a 0.2V to 2V range. An internal 5A current source allows this voltage to be set with a single resistor between ILIM2 and analog ground. External Reference Input for SMPS2. REFIN2 sets the feedback-regulation voltage (V OUT2 = VREFIN2). The MAX17020 includes an internal window comparator to detect when the REFIN2 voltage changes, allowing the controller to blank PGOOD2 and the fault protection. Connect REFIN2 to RTC for fixed 1.05V operation. Connect REFIN2 to VCC for fixed 3.3V operation. Exposed Pad. Connect the backside exposed pad to AGND.
MAX17020
28
PGOOD2
29
SKIP
30
OUT2
31
ILIM2
32
REFIN2
--
EP
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15
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
NOTE: PLACE C22 BETWEEN IN AND PGND AS CLOSE AS POSSIBLE TO THE MAX17020. C22 0.1F DH1 BST1 L1 5V OUTPUT COUT1 D1 DL1 NL1 PGND AGND OUT1 BYP DX1 C5 10nF OUT2 RGND 0 DL2 NL2 D2 CBST1 0.1F LX1 INPUT (VIN)* 7V TO 24V IN DH2 BST2 LX2 CBST2 0.1F L2 3.3V OUTPUT COUT2 NH2 CIN 4 x 10F 25V
NH1
5V SMPS OUTPUT (OUT1)
MAX17020
PGOOD1 PGOOD2 RTC
R6 100k
R7 100k
C6 0.1F C7 10nF 12V TO 15V CHARGE PUMP
}
C3 1F C4 0.1F
POWER-GOOD
RTC SUPPLY
C8 0.1F
R4 500k
DX2 SECFB R5 100k FB1 REF
SKIP
LDOREFIN VDD 5V LDO OUTPUT R1 47 POWER GROUND ANALOG GROUND *LOWER INPUT VOLTAGES REQUIRE ADDITIONAL INPUT CAPACITANCE. IF OPERATING NEAR DROPOUT, COMPONENT SELECTION MUST BE CAREFULLY DONE TO ENSURE PROPER OPERATION. C2 1.0F RILIM1 ILIM1 PAD ILIM2 C1 4.7F LDO ON1 ON2 ONLDO
ON
OFF
VCC REFIN2 TON
X
RILIM2
OUT1/OUT2 SWITCHING FREQUENCY OPEN (REF): 400kHz/300kHz
Figure 1. Standard Application Circuit--Main Supply
16
______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
IN TON SKIP 5V LINEAR REGULATOR ONLDO LDOREFIN LDO
RTC SECFB
3.3V LINEAR REGULATOR
LDO BYPASS CIRCUITRY BYP ILIM2
ILIM1 OUT1 VDD PWM2 CONTROLLER (FIGURE 3)
OUT2 VDD
BST2 DH2 LX2 VDD DL2
BST1 DH1 LX1 VDD DL1 PGND PWM1 CONTROLLER (FIGURE 3)
FB SELECT (PRESET vs. ADJ) FB1 ON1 FB SELECT (PRESET vs. ADJ)
REFIN2 ON2
FAULT2
UVLO PGOOD1
FAULT1
UVLO
POWER-GOOD AND FAULT PROTECTION
POWER-GOOD AND FAULT PROTECTION
PGOOD2
VCC REF
MAX17020
PAD
2V REF
GND
Figure 2. Functional Diagram Overview
______________________________________________________________________________________ 17
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
Table 1. Component Selection for Standard Applications
COMPONENT Input Voltage Input Capacitor (CIN) SMPS 1 Output Capacitor (COUT1) Inductor (L1) High-Side MOSFET (NH1) Low-Side MOSFET (NL1) Current-Limit Resistor (RILIM1) SMPS 2 Output Capacitor (COUT2) Inductor (L2) High-Side MOSFET (NH2) Low-Side MOSFET (NL2) Current-Limit Resistor (RILIM2) 470F, 4V, 15m SANYO 4TPE470MFL 4.3H, 11.4m, 11A Sumida CEP125U Fairchild Semiconductor FDS8690 8.6m/11.4m, 30V Fairchild Semiconductor FDMS8660S 2.6m/3.5m, 30V 200k 330F, 6V, 18m SANYO 6TPE330MIL 4.7H, 9.8m, 7A Sumida CDRH10D68 Vishay Siliconix Si4814DY Dual 30V MOSFET High side: 19m/23m Low side: 18m/22m 200k 330F, 2V, 7m SANYO 2TPF330M7 1.5H, 12A, 7m NEC/Tokin MPLC1040L1R5 Fairchild Semiconductor FDS8690 8.6m/11.4m, 30V Fairchild Semiconductor FDMS8660S 2.6m/3.5m, 30V 49.9k 330F, 6V, 18m SANYO 6TPE330MIL 4.3H, 11.4m, 11A Sumida CEP125U Fairchild Semiconductor FDS6612A 26m/30m, 30V Fairchild Semiconductor FDS6670S 9m/11.5m, 30V 200k 330F, 6V, 18m SANYO 6TPE330MIL 4.7H, 9.8m, 7A Sumida CDRH10D68 Vishay Siliconix Si4814DY Dual 30V MOSFET High side: 19m/23m Low side: 18m/22m 150k (2x) 330F, 2V, 7m SANYO 2TPF330M7 1.5H, 12A, 7m NEC/Tokin MPLC1040L1R5 Fairchild Semiconductor FDS8690 8.6m/11.4m, 30V Fairchild Semiconductor FDMS8660S 2.6m/3.5m, 30V 49.9k 400kHz/300kHz SMPS 1: 5V AT 5A SMPS 2: 3.3V AT 8A VIN = 7V to 24V (4x) 10F, 25V Taiyo Yuden TMK432BJ106KM 400kHz/500kHz SMPS 1: 5V AT 3A SMPS 2: 3.3V AT 5A VIN = 7V to 24V (2x) 10F, 25V Taiyo Yuden TMK432BJ106KM 400kHz/300kHz SMPS 1: 1.5V AT 8A SMPS 2: 1.05V AT 5A VIN = 7V to 24V (4x) 10F, 25V Taiyo Yuden TMK432BJ106KM
Table 2. Component Suppliers
SUPPLIER AVX Corp. Central Semiconductor Corp. Fairchild Semiconductor International Rectifier KEMET Corp NEC/Tokin America, Inc. Panasonic Corp. Philips/nxp Semiconductor Pulse Engineering WEBSITE www.avxcorp.com www.centralsemi.com www.fairchildsemi.com www.irf.com www.kemet.com www.nec-tokinamerica.com www.panasonic.com www.semiconductors.philips.com www.pulseeng.com
SUPPLIER Renesas Technology Corp. SANYO Electric Co., Ltd. Sumida Corp. Taiyo Yuden TDK Corp. TOKO America, Inc. Vishay (Dale, Siliconix) Wurth Elektronik GmbH & Co. KG WEBSITE www.renesas.com www.sanyodevice.com www.sumida.com www.t-yuden.com www.component.tdk.com www.tokoam.com www.vishay.com www.we-online.com
18
______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
Detailed Description
The MAX17020 step-down controller is ideal for highvoltage, low-power supplies for notebook computers. Maxim's Quick-PWM pulse-width modulator in the MAX17020 is specifically designed for handling fast load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The Quick-PWM architecture circumvents the poor load-transient timing problems of fixed-frequency current-mode PWMs, while also avoiding the problems caused by widely varying switching frequencies in conventional constant-on-time and constant-off-time PWM schemes. Figure 2 is a functional diagram overview. Figure 3 is the functional diagram--Quick-PWM core. The MAX17020 includes several features for multipurpose notebook functionality, allowing this controller to be used two or three times in a single notebook--main, I/O chipset, and graphics. The MAX17020 includes a 100mA LDO that can be configured for preset 5V operation--ideal for initial power-up of the notebook and main supply--or can be adjusted for lower voltage operation--ideal for low-power I/O or graphics supply requirements. Additionally, the MAX17020 includes a 3.3V, 5mA RTC supply that remains always enabled, which can be used to power the RTC supply and system pullups when the notebook shuts down. The MAX17020 also includes an optional secondary feedback input that allows an unregulated charge pump or secondary winding to be included on a supply--ideal for generating the low-power 12V to 15V load switch supply. Finally, the MAX17020 includes a reference input on SMPS 2 that allows dynamic voltage transitions when driven by an adjustable resistive voltage-divider or DAC--ideal for the dynamic graphics core requirements.
Adjustable 100mA Linear Regulator
The MAX17020 includes a high-current (100mA) linear regulator that can be configured for preset 5V or 3.3V operation or adjusted between 0.6V to 4V. When the MAX17020 is configured as a main supply, this LDO is required to generate the 5V bias supply necessary to power up the switching regulators. Once the switching regulators are enabled, the LDO can be bypassed using the dedicated BYP input. The adjustable linear regulator allows generation of the 3.3V suspend supply or buffered low-power chipset and GPU reference supplies. The MAX17020 LDO sources at least 100mA of supply current.
MAX17020
Bypass Switch The MAX17020 includes an independent LDO bypass input that allows the LDO to be bypassed by either switching regulator output or from a different regulator all together. When the bypass voltage (BYP) exceeds 93.5% of the LDO output voltage for 500s, the MAX17020 reduces the LDO regulation threshold and turns on an internal p-channel MOSFET to short BYP to LDO. Instead of disabling the LDO when the MAX17020 enables the bypass switch, the controller reduces the LDO regulation voltage, which effectively places the linear regulator in a standby state while switched over, yet allows a fast recovery if the bypass supply drops. Connect BYP to GND when not used to avoid unintentional conduction through the body diode (BYP to LDO) of the p-channel MOSFET.
3.3V RTC Power
The MAX17020 includes a low-current (5mA) linear regulator that remains active as long as the input supply (IN) exceeds 2V (typ). The main purpose of this "always-enabled" linear regulator is to power the realtime clock (RTC) when all other notebook regulators are disabled. RTC also serves as the main bias supply of the MAX17020 so it powers up before the LDO and switching regulators. The RTC regulator sources at least 5mA for external loads.
5V Bias Supply (VCC/VDD) The MAX17020 requires an external 5V bias supply (VDD and VCC) in addition to the battery. Typically, this 5V bias supply is generated by either the internal 100mA LDO (when configured for a main supply) or from the notebook's 95%-efficient 5V main supply (when configured for an I/O chipset, DDR, or graphics). Keeping these bias supply inputs independent improves the overall efficiency and allows the internal linear regulator to be used for other applications as well.
The VDD bias supply input powers the internal gate drivers and the VCC bias supply input powers the analog control blocks. The maximum current required is dominated by the switching losses of the drivers and can be estimated as follows: IBIAS(MAX) = ICC(MAX) + fSWQG 30mA to 60mA (typ)
______________________________________________________________________________________
19
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
Free-Running Constant-On-Time PWM Controller with Input Feed-Forward
The Quick-PWM control architecture is a pseudo-fixedfrequency, constant on-time, current-mode regulator with voltage feed-forward. This architecture relies on the output filter capacitor's ESR to act as a currentsense resistor, so the feedback ripple voltage provides the PWM ramp signal. The control algorithm is simple: the high-side switch on-time is determined solely by a one-shot whose pulse width is inversely proportional to input voltage and directly proportional to output voltage. Another one-shot sets a minimum off-time (400ns typ). The on-time one-shot is triggered if the error comparator is low, the low-side switch current is below the valley current-limit threshold, and the minimum off-time one-shot has timed out. where K (switching period) is set by the tri-level TON input (see the Pin Description section). High-frequency (400kHz/500kHz) operation optimizes the application for the smallest component size, trading off efficiency due to higher switching losses. This might be acceptable in ultra-portable devices where the load currents are lower and the controller is powered from a lower voltage supply. Low-frequency (200kHz/300kHz) operation offers the best overall efficiency at the expense of component size and board space. For continuous conduction operation, the actual switching frequency can be estimated by: fSW = VOUT + VDROP1 tON (VIN + VDROP1 - VDROP2 )
On-Time One-Shot
The heart of the PWM core is the one-shot that sets the high-side switch on-time. This fast, low-jitter, adjustable one-shot includes circuitry that varies the on-time in response to battery and output voltage. The high-side switch on-time is inversely proportional to the battery voltage as sensed by the IN input, and proportional to the output voltage: On-Time = K (VOUT/VIN)
where VDROP1 is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and PCB resistances; VDROP2 is the sum of the voltage drops in the charging path, including the high-side switch, inductor, and PCB resistances; and t ON is the on-time calculated by the MAX17020.
Table 3. Approximate K-Factor Errors
SWITCHING REGULATOR TON SETTING (kHz) 200kHz TON = VCC 400kHz TON = REF or GND 300kHz TON = REF or VCC 500kHz TON = GND TYPICAL K-FACTOR (s) 5.0 2.5 3.3 2.0 K-FACTOR ERROR (%) 10 12.5 10 12.5 COMMENTS Use for absolute best efficiency. Useful in 3-cell systems for lighter loads than the CPU core or where size is key. Considered mainstream by current standards. Good operating point for compound buck designs or desktop circuits.
SMPS 1
SMPS 2
20
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
INTEGRATOR REF
GND
FB INT PRESET OR EXT ADJ
SLOPE COMP
ANALOG SOFTSTART/STOP
REFIN
ON AGND tOFF(MIN) Q TRIG ONE-SHOT S AGND Q R* * RESET DOMINATE LX VCC NEG CURRENT LIMIT Q tON TRIG ONE-SHOT VALLEY CURRENT LIMIT DH DRIVER
ILIM
ON-TIME COMPUTE
TON IN
ZERO CROSSING GND
ULTRASONIC Q TRIG ONE-SHOT
FB
ULTRASONIC THRESHOLD
REFIN GND S Q SKIP THREE-LEVEL DECODE R DL DRIVER
Figure 3. Functional Diagram--Quick-PWM Core
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
Modes of Operation
S Forced-PWM Mode (SKIP = VCC) The low-noise forced-PWM mode (SKIP = VCC) disables the zero-crossing comparator, which controls the low-side switch on-time. This forces the low-side gatedrive waveform to constantly be the complement of the high-side gate-drive waveform, so the inductor current reverses at light loads while DH maintains a duty factor of VOUT/VIN. The benefit of forced-PWM mode is to keep the switching frequency fairly constant. However, forced-PWM operation comes at a cost: the no-load 5V bias current remains between 20mA to 60mA depending on the switching frequency and MOSFET selection. The MAX17020 automatically uses forced-PWM operation during all transitions--dynamic REFIN, startup, and shutdown--regardless of the SKIP configuration. S Automatic Pulse-Skipping Mode (SKIP = GND) In skip mode (SKIP = GND), an inherent automatic switchover to PFM takes place at light loads. This switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current's zero crossing. The zero-crossing comparator threshold is set by the differential across LX and AGND. DC output-accuracy specifications refer to the integrated threshold of the error comparator. When the inductor is in continuous conduction, the MAX17020 regulates the valley of the output ripple and the internal integrator removes the actual DC output-voltage error caused by the output-ripple voltage and internal slope compensation. In discontinuous conduction (SKIP = GND and IOUT < ILOAD(SKIP)), the integrator cannot correct for the low-frequency output ripple error, so the output voltage has a DC regulation level higher than the error comparator threshold by approximately 1.5% due to slope compensation and output ripple voltage. S Ultrasonic Mode (SKIP = Open or REF) Leaving SKIP unconnected or connecting SKIP to REF (2V) activates a unique pulse-skipping mode with a guaranteed minimum switching frequency of 20kHz. This ultrasonic pulse-skipping mode eliminates audiofrequency modulation that would otherwise be present when a lightly loaded controller automatically skips pulses. In ultrasonic mode, the controller automatically transitions to fixed-frequency PWM operation when the load reaches the same critical conduction point (ILOAD(SKIP)) that occurs when normally pulse skipping. An ultrasonic pulse occurs (Figure 4) when the controller detects that no switching has occurred within the last 37s or when SECFB drops below its feedback threshold. Once triggered, the ultrasonic circuitry pulls
22
DL high, turning on the low-side MOSFET to induce a negative inductor current. After the inductor current reaches the negative ultrasonic current threshold, the controller turns off the low-side MOFET (DL pulled low) and triggers a constant on-time (DH driven high). When the on-time has expired, the controller reenables the low-side MOSFET until the inductor current drops below the zero-crossing threshold. Starting with a DL pulse greatly reduces the peak output voltage when compared to starting with a DH pulse. The output voltage at the beginning of the ultrasonic pulse determines the negative ultrasonic current threshold, resulting in the following equation: VNEG(US) = ILRCS = (VNOM - VFB) x 0.385V where VNOM is the nominal feedback-regulation voltage, and VFB is the actual feedback voltage (VFB > VNOM), and RCS is the current-sense resistance seen across LX to AGND.
37s (typ) INDUCTOR CURRENT
ZERO-CROSSING DETECTION
0 ISONIC
ON-TIME (tON)
Figure 4. Ultrasonic Waveforms
Secondary Feedback: SECFB--OUT1 ONLY When the controller skips pulses (SKIP = GND or REF), the long time between pulses (especially if the output is sinking current) allows the external charge-pump voltage or transformer secondary winding voltage to drop. When the SECFB voltage drops below its 2V feedback threshold, the MAX17020 issues an ultrasonic pulse (regardless of the ultrasonic one-shot state). This forces a switching cycle, allowing the external unregulated charge pump (or transformer secondary winding) to be refreshed. See the Ultrasonic Mode (SKIP = Open or REF) section for switching cycle sequence/specifications.
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
Dynamic Output Voltage--OUT2 Only
The MAX17020 regulates OUT2 to the voltage set at REFIN2, so the MAX17020 supports applications that require dynamic output-voltage changes between two set points by adjusting the REFIN2 voltage. For a stepvoltage change at REFIN2, the rate of change of the output voltage is limited either by the internal slew-rate circuit, by the REFIN2 slew rate, or by the component selection--inductor current ramp, the total output capacitance, the current limit, and the load during the transition--whichever is the slowest. The total output capacitance determines how much current is needed to change the output voltage, while the inductor limits the current ramp rate. Additional load current slows down the output voltage change during a positive REFIN2 voltage change, and speeds up the output voltage change during a negative REFIN2 voltage change. Figure 5 is the dynamic REFIN transition.
Valley Current-Limit Protection
The current-limit circuit employs a unique "valley" current-sensing algorithm that senses the inductor current through the low-side MOSFET--across LX to AGND. If the current through the low-side MOSFET exceeds the valley current-limit threshold, the PWM controller is not allowed to initiate a new cycle. The actual peak current is greater than the valley current-limit threshold by an amount equal to the inductor ripple current. Therefore, the exact current-limit characteristic and maximum load capability are a function of the inductor value and battery voltage. When combined with the undervoltage protection circuit, this current-limit method is effective in almost every circumstance. In forced-PWM mode, the MAX17020 also implements a negative current limit to prevent excessive reverse inductor currents when VOUT is sinking current. The negative current-limit threshold is set to approximately 120% of the positive current limit.
MAX17020
Automatic Fault Blanking When the MAX17020 automatically detects that the internal target and REFIN2 are more than 25mV (typ) apart, the controller automatically blanks PGOOD2, blanks the UVP protection, and sets the OVP threshold to REF + 200mV. The blanking remains until 1) the internal target and REFIN2 are within 20mV of each other and 2) an edge is detected on the error amplifier signifying that the output is in regulation. This prevents the system or internal fault protection from shutting down the controller during transitions.
POR, UVLO
When VCC rises above the power-on reset (POR) threshold, the MAX17020 clears the fault latches, forces the low-side MOSFET to turn on (DL high), and resets the soft-start circuit, preparing the controller for power-up. However, the VCC undervoltage lockout (UVLO) circuitry inhibits switching until VCC reaches 4.2V (typ). When V CC rises above 4.2V and the controller has been enabled (ON_ pulled high), the controller activates the enabled PWM controllers and initializes soft-start.
DYNAMIC REFIN WINDOW
REFIN 20mV WINDOW BETWEEN INTERNAL TARGET AND REFIN2 20mV INTERNAL EA TARGET = ACTUAL VOUT 20mV
OUTPUT VOLTAGE
LX PGOOD OVP BLANK HIGH-Z REF + 140mV EA TARGET + 140mV BLANK HIGH-Z EA TARGET + 140mV
Figure 5. Dynamic REFIN Transition
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
When V CC drops below the UVLO threshold (falling edge), the controller stops switching, and DH and DL are pulled low and a 10 switch discharges the outputs. When the 2V POR falling-edge threshold is reached, the DL state no longer matters since there is not enough voltage to force the switching MOSFETs into a low on-resistance state, so the controller pulls DL high, allowing a soft discharge of the output capacitors (damped response). However, if the VCC recovers before reaching the falling POR threshold, DL remains low until the error comparator has been properly powered up and triggers an on-time. Only one enable input needs to be toggled to clear the fault latches and activate both outputs.
MAX17020
the output voltage regulates slightly higher than it would in PWM operation.
Internal Integrator The internal integrator improves the output accuracy by removing any output accuracy errors caused by the slope compensation, output ripple voltage, and erroramplifier offset. Therefore, the DC accuracy (in forcedPWM mode) depends on the integrator's gain, the integrator's offset, and the accuracy of the integrator's reference input. Adjustable/Fixed Output Voltages Connect FB1 to GND for fixed 5V operation. Connect FB1 to VCC for fixed 1.5V operation. Connect FB1 to an external resistive voltage-divider from OUT1 to analog ground to adjust the output voltage between 0.7V and 5.5V. During soft-shutdown, application circuits configured for adjustable feedback briefly switch modes when FB1 drops below the 110mV dual-mode threshold. Choose R FBL (resistance from FB1 to AGND) to be approximately 49.9k and solve for RFBH (resistance from OUT1 to FB1) using the following equation:
V RFBH = RFBL x OUT1 - 1 0.7V Connect REFIN2 to V CC for fixed 3.3V operation. Connect REFIN2 to RTC (3.3V) for fixed 1.05V operation. Connect REFIN2 to an external resistive voltage-divider from REF to analog ground to adjust the output voltage between 0V and 2V. Choose RREFINL (resistance from REFIN2 to GND) to be approximately 49.9k and solve for RREFINH (resistance from REF to REFIN2) using the equation: V RREFINH = RREFINL x REF - 1 VOUT2
Soft-Start and Soft-Shutdown
The MAX17020 includes voltage soft-start and softshutdown--slowly ramping up and down the target voltage. During startup, the slew-rate control softly slews the preset/fixed target voltage over a 1ms startup period or its tracking voltage (REFIN2 < 2V) with a 1mV/s slew rate. This long startup period reduces the inrush current during startup. When ON1 or ON2 is pulled low or the output undervoltage fault latch is set, the respective output automatically enters soft-shutdown--the regulator enters PWM mode and ramps down its preset/fixed output voltage over a 1ms period or its tracking voltage (REFIN2 < 2V) with a 1mV/s slew rate. After the output voltage drops below 0.1V, the MAX17020 pulls DL high, clamping the output and LX switching node to ground, preventing leakage currents from pulling up the output and minimizing the negative output voltage undershoot during shutdown.
Output Voltage
DC output-accuracy specifications in the Electrical Characteristics table refer to the error comparator's threshold. When the inductor continuously conducts, the MAX17020 regulates the valley of the output ripple, so the actual DC output voltage is lower than the slope-compensated trip level by 50% of the output ripple voltage. For PWM operation (continuous conduction), the output voltage is accurately defined by the following equation: V VOUT(PWM) = VNOM + RIPPLE 2A CCV where VNOM is the nominal feedback voltage, ACCV is the integrator's gain, and VRIPPLE is the output ripple voltage (VRIPPLE = ESR x IINDUCTOR, as described in the Output Capacitor Selection section). In discontinuous conduction (IOUT < ILOAD(SKIP)), the longer off-times allow the slope compensation to increase the threshold voltage by as much as 1%, so
Power-Good Outputs (PGOOD) and Fault Protection
PGOOD is the open-drain output that continuously monitors the output voltage for undervoltage and overvoltage conditions. PGOOD_ is actively held low in shutdown (ON_ = GND), during soft-start or soft-shutdown. Approximately 20s (typ) after the soft-start terminates, PGOOD_ becomes high impedance as long as the feedback voltage exceeds 85% of the nominal fixed-regulation voltage or within 150mV of the REFIN2 input voltage. PGOOD_ goes low if the feedback voltage drops 16% below the fixed target voltage, or if the output voltage drops 150mV below the dynamic REFIN2 voltage, or if the SMPS controller is shut down. For a
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
logic-level PGOOD_ output voltage, connect an external pullup resistor between PGOOD_ and VDD. A 100k pullup resistor works well in most applications. design trade-off lies in choosing a good switching frequency and inductor operating point, and the following four factors dictate the rest of the design: * Input Voltage Range: The maximum value (VIN(MAX)) must accommodate the worst-case, high AC-adapter voltage. The minimum value (VIN(MIN)) must account for the lowest battery voltage after drops due to connectors, fuses, and battery-selector switches. If there is a choice at all, lower input voltages result in better efficiency. Maximum Load Current: There are two values to consider. The peak load current (ILOAD(MAX)) determines the instantaneous component stresses and filtering requirements and thus drives output capacitor selection, inductor saturation rating, and the design of the current-limit circuit. The continuous load current (ILOAD) determines the thermal stresses and thus drives the selection of input capacitors, MOSFETs, and other critical heat-contributing components. Switching Frequency: This choice determines the basic trade-off between size and efficiency. The optimal frequency is largely a function of maximum input voltage due to MOSFET switching losses that are proportional to frequency and VIN2. The optimum frequency is also a moving target due to rapid improvements in MOSFET technology that are making higher frequencies more practical. Inductor Operating Point: This choice provides trade-offs between size vs. efficiency and transient response vs. output ripple. Low inductor values provide better transient response and smaller physical size, but also result in lower efficiency and higher output ripple due to increased ripple currents. The minimum practical inductor value is one that causes the circuit to operate at the edge of critical conduction (where the inductor current just touches zero with every cycle at maximum load). Inductor values
MAX17020
Overvoltage Protection (OVP) When the output voltage rises 16% above the fixed-regulation voltage or has risen 200mV above the dynamic REFIN2 input voltage, the controller immediately pulls the respective PGOOD_ low, sets the overvoltage fault latch, and immediately pulls the respective DL_ high-- clamping the output to GND. Toggle either ON1 or ON2 input, or cycle VCC power below its POR threshold to clear the fault latch and restart the controller. Undervoltage Protection (UVP) When the output voltage drops 30% below the fixedregulation voltage or has dropped 300mV below the dynamic REFIN2 input voltage, the controller immediately pulls the respective PGOOD_ low, sets the undervoltage fault latch, and begins the shutdown sequence. After the output voltage drops below 0.1V, the synchronous rectifier turns on, clamping the output to GND. Toggle either ON1 or ON2 input, or cycle VCC power below its POR threshold to clear the fault latch and restart the controller. Thermal-Fault Protection (TSHDN) The MAX17020 features a thermal-fault protection circuit. When the junction temperature rises above +160C, a thermal sensor activates the fault latch, pulls PGOOD1 and PGOOD2 low, enables the 10 discharge circuit, and disables the controller--DH and DL are pulled low. Toggle ONLDO or cycle IN power to reactivate the controller after the junction temperature cools by 15C.
*
*
*
Design Procedure
Firmly establish the input-voltage range and maximum load current before choosing a switching frequency and inductor operating point (ripple-current ratio). The primary
Table 4. Fault Protection and Shutdown Operation Table
MODE CONTROLLER STATE DRIVER STATE DL driven high and DH pulled low after soft-shutdown completed (output < 0.1V). DL immediately driven high, DH pulled low. DL and DH pulled low. DL driven high, DH pulled low. DL driven high, DH pulled low. Voltage soft-shutdown initiated. Internal error-amplifier target Shutdown (ON_ = High to Low); slowly ramped down to GND and output actively discharged Output UVP (Latched) (automatically enters forced-PWM mode). Output OVP (Latched) VCC UVLO Falling-Edge Thermal Fault (Latched) VCC UVLO Rising Edge VCC POR Controller shuts down and EA target internally slewed down. Controller remains off until ON_ toggled or VCC power cycled. SMPS controller disabled (assuming ON_ pulled high), 10 output discharge active. SMPS controller enabled (assuming ON_ pulled high). SMPS inactive, 10 output discharge active.
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
lower than this grant no further size-reduction benefit. The optimum operating point is usually found between 20% and 50% ripple current. When pulse skipping (SKIP low and light loads), the inductor value also determines the load-current value at which PFM/PWM switchover occurs. where t OFF(MIN) is the minimum off-time (see the Electrical Characteristics table) and K is from Table 3. The amount of overshoot during a full-load to no-load transient due to stored inductor energy can be calculated as: VSOAR
Inductor Selection
The switching frequency and inductor operating point determine the inductor value as follows: L= VRIPPLE x (VIN - VOUT ) VIN x fSW x ILOAD(MAX) x LIR
( ILOAD(MAX) )2 x L
2 x COUT x VOUT
Setting the Current Limit
The minimum current-limit threshold must be great enough to support the maximum load current when the current limit is at the minimum tolerance value. The valley of the inductor current occurs at ILOAD(MAX) minus half the ripple current; therefore: ILOAD(MAX) x LIR ILIM(VAL) > ILOAD(MAX) - 2 where ILIM(VAL) equals the minimum valley current-limit threshold voltage divided by the current-sense resistance (RSENSE). When using a 100k ILIM resistor, the minimum valley current-limit threshold is 40mV. Connect a resistor between ILIM_ and analog ground (AGND) to set the adjustable current-limit threshold. The valley current-limit threshold is approximately 1/10 the ILIM voltage formed by the external resistance and internal 5A current source. The 40k to 400k adjustment range corresponds to a 20mV to 200mV valley currentlimit threshold. When adjusting the current limit, use 1% tolerance resistors to prevent significant inaccuracy in the valley current-limit tolerance.
For example: ILOAD(MAX) = 4A, VIN = 12V, VOUT2 = 2.5V, fSW = 355kHz, 30% ripple current or LIR = 0.3: L= 2.5V x (12V - 2.5V) = 4.65H 12V x 355kHz x 4 A x 0.3
Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak inductor current (IPEAK): LIR IPEAK = ILOAD(MAX) x 1 + 2 Most inductor manufacturers provide inductors in standard values, such as 1.0H, 1.5H, 2.2H, 3.3H, etc. Also look for nonstandard values, which can provide a better compromise in LIR across the input voltage range. If using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the LIR with properly scaled inductance values.
Output Capacitor Selection
The output filter capacitor must have low enough equivalent series resistance (ESR) to meet output ripple and load-transient requirements, yet have high enough ESR to satisfy stability requirements. For processor core voltage converters and other applications where the output is subject to violent load transients, the output capacitor's size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance: RESR VSTEP ILOAD(MAX)
Transient Response
The inductor ripple current also impacts transientresponse performance, especially at low VIN - VOUT differentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. The amount of output sag is also a function of the maximum duty factor, which can be calculated from the ontime and minimum off-time:
L x ILOAD(MAX) VSAG =
(
)
2
( V - VOUT ) x K 2 x COUT x VOUT IN - tOFF(MIN) VIN
V K x OUT + tOFF(MIN) VIN
In applications without large and fast load transients, the output capacitor's size often depends on how much ESR is needed to maintain an acceptable level of output voltage ripple. The output ripple voltage of a stepdown controller equals the total inductor ripple current
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
multiplied by the output capacitor's ESR. Therefore, the maximum ESR required to meet ripple specifications is: RESR VRIPPLE ILOAD(MAX) x LIR inches downstream from the feedback sense point, which should be as close as possible to the inductor. Unstable operation manifests itself in two related, but distinctly different ways: double-pulsing and fast-feedback loop instability. Double-pulsing occurs due to noise on the output or because the ESR is so low that there is not enough voltage ramp in the output voltage signal. This "fools" the error comparator into triggering a new cycle immediately after the 400ns minimum offtime period has expired. Double-pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it can indicate the possible presence of loop instability due to insufficient ESR. Loop instability results in oscillations at the output after line or load steps. Such perturbations are usually damped, but can cause the output voltage to rise above or fall below the tolerance limits. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output voltage ripple envelope for overshoot and ringing. It can help to simultaneously monitor the inductor current with an AC current probe. Do not allow more than one cycle of ringing after the initial step-response under/overshoot.
MAX17020
The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value (this is true of tantalums, OS-CONs, polymers, and other electrolytics). When using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent V SAG and V SOAR from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem (see the VSAG and VSOAR equations in the Transient Response section). However, lowcapacity filter capacitors typically have high ESR zeros that could affect the overall stability (see the Output Capacitor Stability Considerations section).
Output Capacitor Stability Considerations
For Quick-PWM controllers, stability is determined by the value of the ESR zero relative to the switching frequency. The boundary of instability is given by the following equation: f fESR SW where: fESR = 1 2 x RESR x COUT
Input Capacitor Selection
The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents: V (V - VOUT ) IRMS = ILOAD x OUT IN VIN For most applications, nontantalum chemistries (ceramic, aluminum, or OS-CON) are preferred due to their resistance to power-up surge currents typical of systems with a mechanical switch or connector in series with the input. If the MAX17020 is operated as the second stage of a two-stage power conversion system, tantalum input capacitors are acceptable. In either configuration, choose a capacitor that has less than 10C temperature rise at the RMS input current for optimal reliability and lifetime.
For a typical 300kHz application, the ESR zero frequency must be well below 95kHz, preferably below 50kHz. Tantalum and OS-CON capacitors in widespread use at the time of publication have typical ESR zero frequencies of 25kHz. In the design example used for inductor selection, the ESR needed to support 25mVP-P ripple is 25mV/1.2A = 20.8m. One 220F/4V SANYO polymer (TPE) capacitor provides 15m (max) ESR. This results in a zero at 48kHz, well within the bounds of stability. Do not put high-value ceramic capacitors directly across the feedback sense point without taking precautions to ensure stability. Large ceramic capacitors can have a high ESR zero frequency and cause erratic, unstable operation. However, it is easy to add enough series resistance by placing the capacitors a couple of
Power-MOSFET Selection
Most of the following MOSFET guidelines focus on the challenge of obtaining high load-current capability when using high-voltage (> 20V) AC adapters. Low-current applications usually require less attention. The high-side MOSFET (NH) must be able to dissipate the resistive losses plus the switching losses at both VIN(MIN) and VIN(MAX). Ideally, the losses at VIN(MIN) should be roughly equal to the losses at VIN(MAX), with lower losses in between. If the losses at VIN(MIN) are
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
significantly higher, consider increasing the size of NH. Conversely, if the losses at VIN(MAX) are significantly higher, consider reducing the size of NH. If VIN does not vary over a wide range, maximum efficiency is achieved by selecting a high-side MOSFET (NH) that has conduction losses equal to the switching losses. Choose a low-side MOSFET (NL) that has the lowest possible on-resistance (RDS(ON)), comes in a moderate-sized package (i.e., 8-pin SO, DPAK, or D2PAK), and is reasonably priced. Ensure that the MAX17020 DL_ gate driver can supply sufficient current to support the gate charge and the current injected into the parasitic drain-to-gate capacitor caused by the high-side MOSFET turning on; otherwise, cross-conduction problems might occur. Switching losses are not an issue for the low-side MOSFET since it is a zero-voltage switched device when used in the step-down topology. where COSS is the high-side MOSFET's output capacitance, QG(SW) is the charge needed to turn on the highside MOSFET, and I GATE is the peak gate-drive source/sink current (1A typ). Switching losses in the high-side MOSFET can become a heat problem when maximum AC adapter voltages are applied due to the squared term in the switchingloss equation provided above. If the high-side MOSFET chosen for adequate RDS(ON) at low battery voltages becomes extraordinarily hot when subjected to V IN(MAX) , consider choosing another MOSFET with lower parasitic capacitance. For the low-side MOSFET (NL), the worst-case power dissipation always occurs at maximum battery voltage:
V 2 PD(NL Re sistive) = 1 - OUT (ILOAD ) x RDS(ON) VIN(MAX)
Power-MOSFET Dissipation
Worst-case conduction losses occur at the duty factor extremes. For the high-side MOSFET (NH), the worstcase power dissipation due to resistance occurs at minimum input voltage: V 2 PD (NH Re sistive) = OUT x (ILOAD ) x RDS(ON) VIN Generally, use a small, high-side MOSFET to reduce switching losses at high input voltages. However, the RDS(ON) required to stay within package power-dissipation often limits how small the MOSFET can be. The optimum occurs when the switching losses equal the conduction (RDS(ON)) losses. High-side switching losses do not become an issue until the input is greater than approximately 15V. Calculating the power dissipation in high-side MOSFETs (NH) due to switching losses is difficult, since it must allow for difficult-to-quantify factors that influence the turn-on and turn-off times. These factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and PCB layout characteristics. The following switching loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including verification using a thermocouple mounted on NH: V(MAX) x ILOAD x fSW x QG(SW) PD(NH Switching) = + IGATE V 2 xC IN OSS x fSW 2
The absolute worst case for MOSFET power dissipation occurs under heavy overload conditions that are greater than ILOAD(MAX), but are not high enough to exceed the current limit and cause the fault latch to trip. To protect against this possibility, "overdesign" the circuit to tolerate: ILOAD(MAX) x LIR ILOAD IVALLEY(MAX) + 2 where I VALLEY(MAX) is the maximum valley current allowed by the current-limit circuit, including threshold tolerance and sense-resistance variation. The MOSFETs must have a relatively large heatsink to handle the overload power dissipation. Choose a Schottky diode (DL) with a forward voltage drop low enough to prevent the low-side MOSFET's body diode from turning on during the dead time. As a general rule, select a diode with a DC current rating equal to 1/3 the load current. This diode is optional and can be removed if efficiency is not critical.
Applications Information
Step-Down Converter Dropout Performance
The output-voltage adjustable range for continuousconduction operation is restricted by the nonadjustable minimum off-time one-shot. For best dropout performance, use the slower (200kHz) on-time setting. When working with low input voltages, the duty-factor limit must be calculated using worst-case values for on- and off-times. Manufacturing tolerances and internal propagation delays introduce an error to the TON K-factor. This error is greater at higher frequencies (Table 3).
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
Also, keep in mind that transient response performance of buck regulators operated too close to dropout is poor, and bulk output capacitance must often be added (see the VSAG equation in the Transient Response section). The absolute point of dropout is when the inductor current ramps down during the minimum off-time (IDOWN) as much as it ramps up during the on-time (IUP). The ratio h = IUP/IDOWN indicates the controller's ability to slew the inductor current higher in response to increased load, and must always be greater than 1. As h approaches 1, the absolute minimum dropout point, the inductor current cannot increase as much during each switching cycle, and V SAG greatly increases unless additional output capacitance is used. A reasonable minimum value for h is 1.5, but adjusting this up or down allows trade-offs between VSAG, output capacitance, and minimum operating voltage. For a given value of h, the minimum operating voltage can be calculated as: VIN(MIN ) = VOUT + VCHG h x t OFF(MIN) 1- K Dropout Design Example: VOUT2 = 2.5V fSW = 355kHz K = 3.0s, worst-case KMIN = 3.3s tOFF(MIN) = 500ns VCHG = 100mV h = 1.5: VIN(MIN ) = 2.5V + 0.1V = 3.47V . 1.5 x 500ns 1- 3.0s
MAX17020
Calculating again with h = 1 and the typical K-factor value (K = 3.3s) gives the absolute limit of dropout: VIN(MIN ) = 2.5V + 0.1V = 3.06V 6 1 x 500ns 1- 3.3s
Therefore, VIN must be greater than 3.06V, even with very large output capacitance, and a practical input voltage with reasonable output capacitance would be 3.47V.
where VCHG is the parasitic voltage drop in the charge path (see the On-Time One-Shot section), tOFF(MIN) is from the Electrical Characteristics table, and K (1/fSW) is taken from Table 3. The absolute minimum input voltage is calculated with h = 1. If the calculated VIN(MIN) is greater than the required minimum input voltage, operating frequency must be reduced or output capacitance added to obtain an acceptable VSAG. If operation near dropout is anticipated, calculate VSAG to be sure of adequate transient response.
Dynamic Output Voltage Settings (OUT2 Only)
The second output (OUT2) of the MAX17020 works with applications that require multiple dynamic output voltages, easily supporting two to four output voltages with external resistors selected by control FETs or REFIN2 can be driven by a DAC for tight voltage control. Figure 6 shows an application circuit providing four voltage levels using discrete components. Switching resistors in and out of the resistor network changes the voltage at REFIN2. The reference input automatically detects large input voltage transitions and blanks the fault and PGOOD2 comparators, allowing the system to perform the transition without tripping the fault protection.
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Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
NOTE: PLACE C22 BETWEEN IN AND PGND AS CLOSE AS POSSIBLE TO THE MAX17020. C22 0.1F NH1 DH1 BST1 L1 1.2V OUTPUT COUT1 D1 DL1 NL1 PGND AGND OUT1 R1 7.15k FB1 R2 10k 1F BYP RTC OUT2 RGND 0 DL2 NL2 D2 CBST1 0.1F LX1 INPUT (VIN)* 5V TO 24V IN DH2 BST2 LX2 CBST2 0.1F L2 COUT2 0.8V/1.2V GPU SUPPLY CIN NH2
MAX17020
REF R3 80.6k REFIN2
C4 0.1F
R5 R4 100k 118k LDO
SLEEP
2V R9 49.9k
C3 4.7F SKIP R8 150k LDOREFIN R6 100k R7 100k 3.3 SYSTEM SUPPLY
5V SYSTEM SUPPLY C1 1.0F R10 47
VDD SECFB
PGOOD1 PGOOD2 TON
}
X
OUT1/OUT2 SWITCHING FREQUENCY OPEN (REF): 400kHz/300kHz ON OFF
POWER-GOOD
VCC C2 1.0F RILIM1 ILIM1 POWER GROUND ANALOG GROUND PAD
ON1 ON2 ONLDO RILIM2 ILIM2
Figure 6. Dynamic Output Application Circuit--Graphics Supply
30
______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
PCB Layout Guidelines
Careful PCB layout is critical to achieving low switching losses and clean, stable operation. The switching power stage requires particular attention. If possible, mount all the power components on the top side of the board, with their ground terminals flush against one another. Follow these guidelines for good PCB layout: * Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitter-free operation. * Keep the power traces and load connections short. This practice is essential for high efficiency. Using thick copper PCBs (2oz vs. 1oz) can enhance fullload efficiency by 1% or more. Correctly routing PCB traces is a difficult task that must be approached in terms of fractions of centimeters, where a single milliohm of excess trace resistance causes a measurable efficiency penalty. Minimize current-sensing errors by connecting LX_ directly to the drain of the low-side MOSFET. When trade-offs in trace lengths must be made, it is preferable to allow the inductor charging path to be made longer than the discharge path. For example, it is better to allow some extra distance between the input capacitors and the high-side MOSFET than to allow distance between the inductor and the lowside MOSFET or between the inductor and the output filter capacitor. Route high-speed switching nodes (BST_, LX_, DH_, and DL_) away from sensitive analog areas (REF, FB_, and OUT_).
Layout Procedure 1) Place the power components first, with ground terminals adjacent (NL_ source, CIN, COUT_, and DL_ anode). If possible, make all these connections on the top layer with wide, copper-filled areas.
2) Mount the controller IC adjacent to the low-side MOSFET, preferably on the back side opposite NL_ and NH_ to keep LX_, GND, DH_, and the DL_ gatedrive lines short and wide. The DL_ and DH_ gate traces must be short and wide (50 mils to 100 mils wide if the MOSFET is 1in from the controller IC) to keep the driver impedance low and for proper adaptive dead-time sensing. 3) Group the gate-drive components (BST_ capacitor, VDD bypass capacitor) together near the controller IC. 4) Make the DC-DC controller ground connections as shown in Figures 1 and 6. This diagram can be viewed as having two separate ground planes: power ground, where all the high-power components go; and an analog ground plane for sensitive analog components. The analog ground plane and power ground plane must meet only at a single point directly at the IC. 5) Connect the output power planes directly to the output filter capacitor positive and negative terminals with multiple vias. Place the entire DC-DC converter circuit as close to the load as is practical.
MAX17020
* *
*
A sample layout is available in the MAX17020 evaluation kit data sheet.
Table 5. MAX17020 vs. MAX8778 Design Differences
MAX17020 RTC power-up required for controller operation. MAX8778 LDO and switching regulators independent of RTC operation.
______________________________________________________________________________________
31
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
NOTE: PLACE C22 BETWEEN IN AND PGND AS CLOSE AS POSSIBLE TO THE MAX17020. C22 0.1F DH1 BST1 L1 1.5V OUTPUT COUT1 DL1 NL1 PGND AGND OUT1 OUT2 RGND 0 3.3 SMPS SUPPLY R2 10k FB1 SECFB 5V SYSTEM SUPPLY R10 47 C2 1.0F 3.3V SMPS SUPPLY C5 1F SKIP 3.3V LDO OUTPUT C6 4.7F LDO ON1 ON2 ONLDO ON OFF C1 4.7F VDD DL2 NL2 CBST1 0.1F LX1 INPUT (VIN)* 7V TO 24V IN DH2 BST2 LX2 CBST2 0.1F L2 1.05V OUTPUT COUT2 NH2 CIN 2x 10F 25V
NH1
R1 11.3k
MAX17020
PGOOD1 PGOOD2
R6 100k
R7 100k
}
C3 1F C4 0.1F
POWER-GOOD
REFIN2 RTC RTC SUPPLY
VCC LDOREFIN BYP REF
RILIM1 ILIM1 POWER GROUND ANALOG GROUND
TON
X
OUT1/OUT2 SWITCHING FREQUENCY OPEN (REF): 400kHz/300kHz RILIM2
ILIM2 PAD
Figure 7. Standard Output Application Circuit--Chipset Supply
32
______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator
Chip Information
PROCESS: BiCMOS
PACKAGE TYPE 32 TQFN
Package Information
For the latest package outline information, go to www.maxim-ic.com/packages. PACKAGE CODE T3255-3 DOCUMENT NO. 21-0140
MAX17020
______________________________________________________________________________________
33
Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator MAX17020
Revision History
REVISION NUMBER 0 1 2 REVISION DATE 5/08 9/08 2/09 Initial release Added three new TOCs, various changes throughout Minor edits to EC table and text additions DESCRIPTION PAGES CHANGED -- 3, 8, 12-15, 24, 25, 26, 33 1, 5, 7, 14, 15, 23
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
34 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products. Inc.

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